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Wednesday, March 16, 2011

How To Read SDF (Standard Delay Format) - Part2



Part4


In the Part1 we have discussed following things:
  • Full Form of SDF
  • What is SDF?
  • Tools using this Format
  • Information in the SDF
  • Naming Convention of SDF file
  • Requirement of SDF.
Now We will discuss about the content present in the SDF file.

SDF Constructs:  Every SDF file has few KeyWord know as Constructs. Few of them are mention below.

  • DELAYFILE, SDFVERSION, DESIGN, DATE, VENDOR, PROGRAM, VERSION, DIVIDER, VOLTAGE, PROCESS, TEMPERATURE, TIMESCALE
  • CELL, CELLTYPE, INSTANCE
  • ABSOLUTE, COND, CONDELSE, COSETUP, DELAY, HOLD, INTERCONNECT, IOPATH, NOCHANGE, PERIOD, RECOVERY, RECREM, RETAIN, SETUP, SETUPHOLD, SKEW, TIMINGCHECK, WIDTH
  • Posedge and negedge identifiers
  • INCREMENT, CORRELATION, PATHPULSE, GLOBALPATHPULSE, PORT, DEVICE, SUM, DIFF, SKEWCONSTRAINT, PATHCONSTRAINT
Meaning and uses of each of the Construct will be discuss one by one.

NOTE: It's not necessary that every EDA tool should use all the SDF constructs, they may not support few of the constructs. So when ever you are using a SDF file generated from any other tool, so please check the compatibility of all the SDF constructs across both the tools. As an example Primetime during "write_sdf" command does not use following SDF Constructs (out of the above list)

INCREMENT, CORRELATION, PATHPULSE, GLOBALPATHPULSE, PORT, DEVICE, SUM, DIFF, SKEWCONSTRAINT, PATHCONSTRAINT.



Syntax of SDF file:         (DELAYFILE <header section>  <cell section> )

Header Section contains all the relevant information about the SDF file like design name, sdf version, tool which is used to generate this SDF file, temperature, voltage etc. Most of the information is only for documentation purpose and are optional.
Cell Section has all the important information require for timing calculation like delay, timing constraints, timing environment and etc for a particular cell or part of the design.

Before we will discuss about these section in detail lets see a sample SDF file.

Sample SDF file:

(DELAYFILE                                                                         // Header Section
(SDFVERSION "4.0")
(DESIGN "MYDESIGN")
(DATE "March 15, 2011 09:00")
(VENDOR "SYNOPSYS_MAGMA")
(PROGRAM "Timing Tool")
(VERSION "1.2a")
(DIVIDER /)
(VOLTAGE 1.2:1.0:0.8)
(PROCESS "best:nom:worst")
(TEMPERATURE -40:25:125)
(TIMESCALE 100 ps)

(CELL                                                                              // Cell 1
(CELLTYPE "MYDESIGN")
(INSTANCE top)
(DELAY
(ABSOLUTE
(INTERCONNECT mck b/c/clk (.6:.7:.9))
(INTERCONNECT d[0] b/c/d (.4:.5:.6))
    )
)
)

(CELL                                                                             // Cell 2
(CELLTYPE "AND2")
(INSTANCE top/b/d)
(DELAY
(ABSOLUTE
(IOPATH a y (1.5:2.5:3.4) (2.5:3.6:4.7))
(IOPATH b y (1.4:2.3:3.2) (2.3:3.4:4.3))
)
)
)

(CELL                                                                              // Cell 3
(CELLTYPE "DFF")
(INSTANCE top/b/c)
(DELAY
(ABSOLUTE
(IOPATH (posedge clk) q (2:3:4) (5:6:7))
(PORT clr (2:3:4) (5:6:7))
)
   )
(TIMINGCHECK
(SETUPHOLD d (posedge clk) (3:4:5) (-1:-1:-1))
(WIDTH clk (4.4:7.5:11.3))
)
)

(CELL                                                                               // Cell4.. Cell n
. . .
)
)


Header Section:

As I have mentioned above that this section is mainly for the documentation purpose. In the Header section, sdf version is a compulsory field.
Below are the different SDF file Constructs and their details which are the parts of Header Section.


Fields/Entities of Header Section
SDF File Constructs
Remark
Sdf version
SDFVERSION
(Compulsory Field)
Identify the version of the Standard Delay Format specification
Design Name
DESIGN (Optional)
Specifies Name of the design
Date
DATE (Optional)
Represents the Date and/or time when SDF file was generated
Vendor
VENDOR (Optional)
Name of the vendor whose tools generated the SDF file
Program Name
PROGRAM (Optional)
Name of the program/tool used to generate the SDF file
Program Version
VERSION (Optional)
Tool version used to generate the SDF
Hierarchy Divider
DIVIDER (Optional)

[Default value= “.”]
Represent which characters is used in SDF to separate elements of a hierarchical path.
Allowed values are period “.” Or Slash “/”.
Voltage
VOLTAGE (Optional)
Specifies the operating voltage for which the data was computed.
Process
PROCESS (optional)
Specifies the process factor for which the data in the file was computed
Temperature
TEMPERATURE (optional)
Specifies the operating temperature in degrees Celsius (centigrade)
Time Scale
TIMESCALE
Default value= 1ns
Specifies the units used for all time values in the SDF file



Lets understand it with few example. A snap shot from above example to understand most of the things.

(SDFVERSION "4.0")
(DESIGN "MYDESIGN")
(DATE "March 15, 2011 09:00")
(VENDOR "SYNOPSYS_MAGMA")
(PROGRAM "Timing Tool")
(VERSION "1.2a")
(DIVIDER /)
(VOLTAGE 1.2:1.0:0.8)
(PROCESS "best:nom:worst")
(TEMPERATURE -40:25:125)
(TIMESCALE 100 ps)


Few more details about above parameters...

(DIVIDER /)
If you want to specify the timing of a specific cell present in some hierarchy, you have to specify a complete path. In that case the character you use to separate different element of the path is specified by this SDF construct.
E.g   for a AND gate present in a "top_design" with in "block1" and sub block "block2" there are 2 ways in the SDF file as per character defined in DIVIDER.
  • top_design/block1/block2/AND or
  • top_design.block1.block2.AND
(VOLTAGE 1.2:1.0:0.8)
The sequence of voltages are important here. Although not a single tool will use these information because these are only for documentation purpose. But as a consistence with the order of delay and timing check limit values in triples (minimum:typical:maximum), it should be highest voltage first and lowest voltage as last (since minimum delays usually occur at the highest supply voltage).

(TIMESCALE 100 ps)
Indicates that all time values in the file are to be multiplied by 100 picoseconds.  Means if a delay for particular path is mention like
IOPATH  (poseedge A)  Z  (2:3:4) (5:6:7))
then it means the actual delay is (0.2ns:0.3ns:0.4ns) and (0.5ns:0.6ns:0.7ns)

Please Read the Next blog for detail about the Cell Section.



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