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Tuesday, August 24, 2010

How To Read SPEF

Chapter 1
Chapter 2
Chapter 3
Chapter 4


SPEF (Standard Parasitic Exchange Format) is documented in chapter 9 of IEEE 1481-1999. Several methods of describing parasitics are documented, but we are discussing only few important one.

General Syntax
A typical SPEF file will have 4 main sections
a header section,
a name map section,
a top level port section and
the main parasitic description section.
Generally, SPEF keywords are preceded with a *. For example, *R_UNIT, *NAME_MAP and *D_NET.
Comments start anywhere on a line with // and run to the end of the line. Each line in a block of comments must start with //.

Header Information
The header section is 14 lines containing information about
the design name,
the parasitic extraction tool,
naming styles
and units.
When reading SPEF, it is important to check the header for units as they vary across tools. By default, SPEF from Astro will be in pF and kOhm while SPEF from Star-RCXT will be in fF and Ohm.

Name Map Section
To reduce file size, SPEF allows long names to be mapped to shorter numbers preceded by a *. This mapping is defined in the name map section. For example:
*509 F_C_EP2
*510 F_C_EP3
*511 F_C_EP4
*512 F_C_EP5
*513 TOP/BUF_ZCLK_2_pin_Z_1
*514 TOP/BUF_ZCLK_3_pin_Z_1
*515 TOP/BUF_ZCLK_4_pin_Z_1
Later in the file, F_C_EP2 can be referred to by its name or by *509. Name mapping in SPEF is not required. Also, mapped and non-mapped names can appear in the same file. Typically, short names such as a pin named A will not be mapped as mapping would not reduce file size. You can write a script will map the numbers back into names. This will make SPEF easier to read, but greatly increase file size.

Port Section
The port section is simply a list of the top level ports in a design. They are also annotated as input, output or bidirect with an I, O or B. For example:
*1 I
*2 I
*3 O
*4 O
*5 O
*6 O
*7 O
*8 B
*9 B

Each extracted net will have a *D_NET section. This will usually consist of a *D_NET line, a *CONN section, a *CAP section, *RES section and a *END line. Single pin nets will not have a *RES section. Nets connected by abutting pins will not have a *CAP section.
*D_NET regcontrol_top/GRC/n13345 1.94482
*I regcontrol_top/GRC/U9743:E I *C 537.855 9150.11 *L 3.70000
*I regcontrol_top/GRC/U9409:A I *C 540.735 9146.02 *L 5.40000
*I regcontrol_top/GRC/U9407:Z O *C 549.370 9149.88 *D OR2M1P
1 regcontrol_top/GRC/U9743:E 0.936057
2 regcontrol_top/GRC/U9409:A regcontrol_top/GRC/U10716:Z 0.622675
3 regcontrol_top/GRC/U9407:Z 0.386093
1 regcontrol_top/GRC/U9743:E regcontrol_top/GRC/U9407:Z 10.7916
2 regcontrol_top/GRC/U9743:E regcontrol_top/GRC/U9409:A 8.07710
3 regcontrol_top/GRC/U9409:A regcontrol_top/GRC/U9407:Z 11.9156
The *D_NET line tells the net name and the net's total capacitance. This capacitance will be the sum of all the capacitances in the *CAP section.

*CONN Section
The *CONN section lists the pins connected to the net. A connection to a cell instance starts with a *I. A connection to a top level port starts with a *P.
The syntax of the *CONN entries is:
*I <pin name> <direction> *C <xy coordinate> <loading or driving information>
The pin name is the name of the pin.
The direction will be I, O or B for input, output or bidirect.
The xy coordinate will be the location of the pin in the layout.
For an input, the loading information will be *L and the pin's capacitance.
For an output, the driving information will be *D and the driving cell's type.
Coordinates for *P port entries may not be accurate because some extraction tools look for the physical location of the logical port (which does not exist) rather then the location of the corresponding pin.

*CAP Section
The *CAP section provides detailed capacitance information for the net. Entries in the *CAP section come in two forms, one for a capacitor lumped to ground and one for a coupled capacitor.
A capacitor lumped to ground has three fields,
an identifying integer,
a node name and
the capacitance value of this node
o 1 regcontrol_top/GRC/U9743:E 0.936057
A coupling capacitor has four fields,
an identifying integer,
two node names and
The values of the coupling capacitor between these two nodes
o 2 regcontrol_top/GRC/U9409:A regcontrol_top/GRC/U10716:Z 0.622675
If netA is coupled to netB, the coupling capacitor will be listed in each net's *CAP section.

*RES Section
The *RES section provides the resistance network for the net.
Entries in *RES section contain 4 fields,
an identifying integer,
two node names and
the resistance between these two nodes.
o 1 regcontrol_top/GRC/U9743:E regcontrol_top/GRC/U9407:Z 10.7916
The resistance network for a net can be very complex. SPEF can contain resistor loops or seemingly ridiculously huge resistors even if the layout is a simple point to point route. This is due how the extraction tool cuts nets into tiny pieces for extraction and then mathematically stitches them back together when writing SPEF.

Parasitic Values
The above examples show a single parasitic value for each capacitor or resistor. It is up to the parasitic extraction and delay calculation flow to decide which corner this value represents. SPEF also allows for min:typ:max values to be reported:
1 regcontrol_top/GRC/U9743:E 0.936057:1.02342:1.31343
The IEEE standard requires either 1 or 3 values to be reported. However, some tools will report min:max pairs and it is expected that tools may report many corners (corner1:corner2:corner3:corner4) in the future.


  1. Hi,

    Thanks for the info.

  2. Thanks alot.
    It's explained in an excellent way.

  3. great job, thanks ..!

  4. Thanks a lot. This really helps

  5. I did a lot of search on net but this is probably the best explanation. Thanks for the good work done

  6. Wonderful work! Keep it up! God bless!

  7. Thanks.
    This is very useful to me. ^^

  8. Well written article.

  9. Thanks. Very well explained

  10. is there any way in SPEF to tell which layer a particular piece of resistance derived from?

    1. Hi Naresh,
      Nop. This is a net base extraction. That's the reason, its know as extracted Netlist. So it has the information with respect to Nets but not exactly with respect to the Metal layers.
      There are several workaround for doing this (with the help of scripting and all) , which most of the time different degign team use.

      In case you need any specif detail- Please let me know.


    2. Hi Naresh,

      I have checked on your question once again. Its like.. if you need layer based resistance information into the SPEF, then u have to regenerate the SPEF with the modification in the Command file. So in case you are generating the SPEF from StarRcxt tool then u can do it.
      you can use below mention 2 switch in your Starcommand file.. and regenerate the whole SPEF.


      I will suggest that check the manual for these 2 command and you can get the rest of the information.

      Let me know in case this is helpful to u or you were expecting something else.

  11. helped me! thanks!

  12. thanks a lot for the info...

  13. Has anyone ever seen a tool that would construct a visual picture of a SPEF? A tool like that would make understanding exactly how a SPEF is connected much easier. I would like this b/c there are alot of different ways to treat, for instance, cell pin shapes, in an extraction...

    Just curious. Thanks.

  14. This comment has been removed by the author.

  15. I did a lot of search on net but this is the very best explanation. Thanks for the generally understandable and well description!

  16. nice description..

  17. In my SPEF file, I'm getting below mentioned lines:
    0 CLK_BAR:16 M0:g 2.646e-05
    1 CLK_BAR:2 VDD:33 2.47461e-05

    But, in my SPICE file, there are no nodes with numbers 16 and 2. I'm using MentorGrahics IC PEX to extract parasitic. You have given such a great article. I hope you would help me out here.

  18. Thank you very much for explaining in a easy way !


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