## Index

 STA & SI Chapter1 Chapter2 Chapter3 Chapter4 Chapter5 Chapter6 Chapter7 Chapter8 Introduction Static Timing Analysis Clock Advance STA Signal Integrity EDA Tools Timing Models Other Topics

 Extraction & DFM Chapter1 Chapter2 Chapter3 Chapter4 Chapter5 Chapter6 Introduction Parasitic Interconnect Corner (RC Corner) Manufacturing Effects and Their Modeling Dielectric Layer Process Variation Other Topic

# Introduction

In the combinational circuits, output at any given point of time depend only on the input at that time and no relationship with the past inputs. Same thing I can say in different way.
• Circuit respond to the input without any delay (so that even if you apply any other input, it will not effect the output correspond to previous input)
• The time interval between the two successive inputs are so long that within that time circuit respond to the first input.(Means when you apply second input, output is already generated correspond to first input).

but there are situations when an output depends on the present input and condition of the circuit at that time ,which is because of previous input/inputs. This (condition of circuit because of previous inputs) is consider as "storing" the information (means there is a "Memory element") correspond to past inputs.

Note : Basic difference between the Sequential circuits and Combinational Circuits are already explained in the Topic "Combinational Circuits".

Now from definition point of view we can say that
" A digital Circuit is a sequential circuit if it's outputs at any given time are function the external inputs at that time and sequence of past inputs. "

On the basis of tis definition we can classify sequential logic into two models.
• Mealy Model
• Moore Model

From the above figure, you can see that there are 2 types of Inputs
• Primary Inputs from External World
• Secondary Inputs which describe the condition of circuit at the arrival of present inputs.

On the basis of Output from the Combinational Circuit, these two models (Mealy and Moore) are classified.

In Mealy Model - External Outputs depend both on inputs from outside world and on the feedback inputs from memory.

In Moore Model - Output does not depend directly on external inputs. External Inputs causes changes in memory, after which external output emitted from the memory.

In both the above model two thing are hidden which may be or may not be figured out by you.
1. Expected output correspond to every Input
2. "Stability of circuit".
Expected Output correspond to every Input
When ever you apply a input to a circuit, you always expect certain output. Even in above models (Mealy and Moore), when ever you apply a input you know the state of the circuit (condition of the circuit because of the pervious inputs), so it's easy for you to predict the output after certain time (because you have designed that circuit). In case, we don't get expected output, we start tracking back the reason of that.

Stability Of Circuit:
You have applied 1 input which will make some changes in the state of the combinational unit, which is then make changes in the Memory unit (so called feedback unit). Output of the memory unit, which is again feed back as input to the combinational circuit changes the state of the combinational circuit. This process goes on till the time circuit become stable.

From the time of the initial change in input and the final change in output takes place there is a period of instability. If a further change in primary input takes place during this period of instability. the circuit might fail to give a expected output because it isn't clear what the contents of memory are when second input applies. There are changes of the Glitch.

Note:
Lets assume that you provide a input to a circuit and you are expecting some output, but before output settles to your expected value, there is/are some unwanted transitions (one or more). And these Transitions are known as Glitches.

There is only one good solution of this problem. Disconnect the whole system (circuit) from the external world till the time it become stable. Once It become stable, reconnect it. This Disconnect and reconnect usually done with the help of an extra signal, commonly known as Clock (some time Terminology "Enable Signal" also works).

Note:

Now we can say that there are 2 Types of Sequential Circuit
1. Non-Clocked Sequential Circuit
2. Clocked Sequential Circuit

In a Design there may be several clocked sequential circuits interconnected which have different Enable signal (Connect and Reconnect Signal from the External World - Clock Signal). Means One circuit is clocked by CLK1 and other is CLK2 are interconnected. If that's the case, again same problem came into the picture as we have discussed above. Because one circuit don't know when other circuit become stable (or say produce a output after internal stability). So they can't be disconnect or connect as per the other circuit's output (Both circuits are not synchronize with each other). Again same case of Glitch can be there.
If both circuit can be synchronize with each other, this problem solved. And this can be done with a common Clock signal. :) So I can say from Definition point of view that
"If all the enabling clocks in Interconnected circuits are the same, then activity in all circuits will occur synchronously. Such Circuits are known as Synchronous Sequential Circuits".

That Means above category can be renamed as (which is more common)
1. Synchronous Sequential Circuits ( Clocked Sequential Circuit)
2. Asynchronous Sequential Circuits ( Non-Clocked Sequential Circuit)
Note: Difference about these 2 type of circuit already discussed in the Article "Combinational Circuits"

In the next Article, we will discuss more about the Synchronous Sequential Circuits.

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